How to Write a Test Bench and Run RTL Simulation in Quartus and ModelSim

Quartus Prime Lite Edition can be downloaded from Intel Download Center for FPGAs. This video used version 20.1. The book chapter in this video was from Digital VLSI Systems Design by Seetharaman Ramachandran (Springer, 2007). This video shows how to write a Test Bench for an FPGA design with Verilog and run RTL Simulation with ModelSim. ------------------------------------------------- Background Music: